MVME162-013 modular

Description

MVME162-013

The MVME162 is equipped with an MC68040 or MC68LC040 microprocessor.

The MC68040/MC68LC040 have on-chip instruction and data caches; the

MC68040 also provides a floating-point coprocessor. Refer to the M68040

Microprocessor User’s Manual for more information.

EPROM and Flash Memory

The MVME162 implementation includes four 2-Mbit Flash devices organized

in a 256Kbit x 8 configuration. The EPROM location is a standard JEDEC 32-

pin PLCC capable of 4 Mbit densities (128 Kbit x 8; 256 Kbit X 8; 512 Kbit x 8;

1 Mbit x8) organized as a 512Kbit x 8 device. A jumper setting (GPIO3, pins 9-

10 on J22) allows reset code to be fetched either from Flash memory (GPIO3

installed) or from the EPROM (GPIO3 removed).

SRAM

The MVME162 provides 512KB of 32-bit-wide onboard static RAM in a single

non-interleaved architecture with onboard battery backup. The worst case

elapsed time for battery protection is 200 days. Specifics on SRAM

performance can be found in the section on the SRAM Memory Controller in

the MCchip Programming Model in the MVME162 Embedded Controller

Programmer’s Reference Guide. The SRAM arrays are not parity protected.

The battery backup function for the MVME162 SRAM is provided by a Dallas

DS1210S device that supports primary and secondary power sources. In the

event of a main board power failure, the DS1210S checks power sources and

switches to the source with the higher voltage.