MVME162-202 modular

Description

MVME162-202

Introduction

This chapter describes the MVME162 Embedded Controller on a block

diagram level. The Functional Description provides an overview of the

MVME162, followed by a detailed description of several blocks of MVME162

circuitry. Figure 4-1 shows a block diagram of the MVME162 main module.

Figure 4-2 shows a block diagram of the parity DRAM mezzanine module.

Descriptions of other MVME162 blocks, including programmable registers in

the ASICs and peripheral chips, are given in the MVME162 Embedded

Controller Programmer’s Reference Guide. Refer to it for the rest of the functional

description of the MVME162.

MVME162 Functional Description

The MVME162 is a high-functionality VMEbus single board computer

designed around the MC68040/MC68LC040 chip. It has 1MB, 4MB, or 8MB of

DRAM, 512KB of SRAM, 1MB Flash memory, four MVIP IndustryPack

interfaces, and two serial ports (one EIA-232-D DCE; one EIA-232-D or EIA530 DCE/DTE). Options include an SCSI mass storage interface, a LAN

Ethernet transceiver interface, and a non-VMEbus version.

Data Bus Structure

The local data bus on the MVME162 is a 32-bit synchronous bus that is based

on the MC68040 bus, and which supports burst transfers and snooping. The

various local bus master and slave devices use the local bus to communicate.

The local bus is arbitrated by priority type arbiter and the priority of the local

bus masters from highest to lowest is: 82596CA LAN, NCR 53C710 SCSI,

VMEbus, and MPU. Generally speaking, any master can access any slave;

however, not all combinations pass the common sense test. Refer to the

MVME162 Embedded Controller Programmer’s Reference Guide and to the user’s

guide for each device to determine its port size, data bus connection, and any

restrictions that apply when accessing the device.

MVME162-040

MVME162-040

MVME162-202